Back to home
Technology

Nvidia CEO Huang says upcoming DGX Spark systems are powered by N1 silicon — confirms GB10 Superchip and N1/N1X SoCs are identical

Source

Tom's Hardware

Published

TL;DR

AI Generated

Nvidia CEO Jensen Huang confirmed that the upcoming N1 SoC is essentially the same as the existing GB10 Superchip, part of the DGX Spark lineup, designed for AI workloads. The N1/N1X SoCs were speculated upon following Nvidia's Project DIGITS announcement in collaboration with MediaTek. The N1 SoC is expected to feature 6,144 CUDA cores for its GPU and a 20-core CPU built using Nvidia's Grace architecture. Huang's statement suggests that the N1 and GB10 are closely linked, with the N1 possibly being a lower-binned version of the GB10. The N1's development is part of Nvidia's move towards mainstream CPU cores following Tegra, and its collaboration with Intel for ARM-based products is not expected to impact its roadmap.

Read Full Article

Similar Articles

Desktop GPU roadmap: Nvidia Rubin, AMD UDNA & Intel Xe3 Celestial

Desktop GPU roadmap: Nvidia Rubin, AMD UDNA & Intel Xe3 Celestial

The article discusses the latest developments in desktop GPU technology from Nvidia, AMD, and Intel. Nvidia's upcoming Rubin architecture is expected to debut in late 2026, featuring significant improvements in transistor density and power efficiency. AMD is transitioning to its UDNA architecture, aiming for a unified design targeting both gaming and compute workloads, expected to launch in late 2026. Intel's Xe3 Celestial architecture is progressing towards volume production, likely to debut in early 2027. Each company is focusing on advancements in AI acceleration, memory technologies, and architectural enhancements to push the boundaries of desktop GPU capabilities in the coming years.

Tom's Hardware
Nvidia Rubin CPX die shot reveals graphics-specific hardware blocks not needed for an AI GPU — Rubin CPX may form the foundation of next-gen RTX 6090

Nvidia Rubin CPX die shot reveals graphics-specific hardware blocks not needed for an AI GPU — Rubin CPX may form the foundation of next-gen RTX 6090

Nvidia's Rubin CPX GPU, initially designed for AI tasks, may actually contain graphics-specific hardware blocks like Raster Output Pipelines and display engines, leading to speculation that it could lay the groundwork for the next-gen RTX 6090. The die shot of Rubin CPX reveals 16 Graphics Processing Clusters and 256 Raster Output Pipelines, potentially offering significant performance gains over the RTX 5090. If repurposed for gaming, Rubin CPX could deliver around 28,672 CUDA cores and 224 ROPs, indicating a notable performance uplift. The inclusion of a 512-bit memory bus, GDDR7 support, and PCIe 6.0 hints at the possibility of Rubin CPX being a stepping stone for future GPU advancements. The release of Rubin CPX is expected at the end of 2026, with the RTX 6090 possibly being announced at CES 2027.

Tom's Hardware
$142 upgrade kit and spare modules turn Nvidia RTX 4090 24GB to 48GB AI card — technician explains how Chinese factories turn gaming flagships into highly desirable AI GPUs

$142 upgrade kit and spare modules turn Nvidia RTX 4090 24GB to 48GB AI card — technician explains how Chinese factories turn gaming flagships into highly desirable AI GPUs

Chinese factories are upgrading Nvidia's GeForce RTX 4090 24GB graphics card to 48GB for AI workloads using a $142 "upgrade kit" with a custom PCB and additional memory chips. A technician demonstrated the process of doubling the memory capacity by soldering components onto the PCB. Modified firmware is also uploaded to enable the expanded memory. The total cost for the upgrade is around $430, offering a 39% savings compared to buying a pre-upgraded card. With RTX 4090 supply decreasing, factories may soon turn to upgrading the RTX 5090, potentially leading to even higher memory configurations like the rumored 128GB RTX 5090.

Tom's Hardware
Chip Industry Technical Paper Roundup: August 26

Chip Industry Technical Paper Roundup: August 26

New technical papers added to Semiconductor Engineering's library cover topics like Ultra Ethernet design principles, wire-friendly processors, thermal-aware scheduling for AI workloads, chip-to-chip photonic fabrics, photolithography for 2D materials, LLM acceleration architecture, and carbon nanotube transistors. These papers involve collaborations between various research organizations and universities like ETH Zurich, Intel, University of Wisconsin–Madison, Cornell University, and more. The papers aim to explore innovative solutions for improving performance and efficiency in semiconductor technologies. You can find more semiconductor research papers on Semiconductor Engineering's website.

SemiEngineering

We use cookies

We use cookies to ensure you get the best experience on our website. For more information on how we use cookies, please see our cookie policy.