Back to home

Articles tagged with "DUV, Lithography, Semiconductors"

Chinese fabs are reportedly upgrading older ASML DUV lithography chipmaking machines — secondary channels and independent engineers used to soup up Twinscan NXT series

Chinese fabs are reportedly upgrading older ASML DUV lithography chipmaking machines — secondary channels and independent engineers used to soup up Twinscan NXT series

Chinese fabs are upgrading older ASML DUV lithography machines to sustain chip output amid export controls. These upgrades aim to improve overlay accuracy and throughput on older machines, providing a capacity boost for Chinese manufacturers. With restrictions on new tool exports, Chinese firms are turning to reverse engineering and grey-market components to enhance performance. While these upgrades won't match newer EUV machines, they can help recover capacity at advanced DUV-based nodes. The actions highlight a shift in enforcement pressure to constrain output by targeting parts, expertise, and process knowledge that keep existing tools competitive.

Tom's Hardware
Chinese scientists discover method to cut defects by 99% with DUV chipmaking equipment, but it destroys EUV pattern fidelity — analyzing photoresist clustering with cryo-ET at 105°C

Chinese scientists discover method to cut defects by 99% with DUV chipmaking equipment, but it destroys EUV pattern fidelity — analyzing photoresist clustering with cryo-ET at 105°C

Chinese scientists have discovered a method using DUV chipmaking equipment to reduce defect density by up to 99%, but this process compromises EUV pattern fidelity. By analyzing photoresist clustering with cryo-ET at 105°C, researchers from Peking University and Tsinghua University found that increasing the post-exposure bake temperature and maintaining a continuous developer layer can significantly cut defects on 300mm wafers. However, the practical implications of this research are limited as chipmakers already carefully select PEB temperatures for optimal results. While the study provides valuable insight into photoresist behavior during development, its impact on semiconductor manufacturing is constrained, particularly for advanced nodes using EUV lithography.

Tom's Hardware

No more articles to load

We use cookies

We use cookies to ensure you get the best experience on our website. For more information on how we use cookies, please see our cookie policy.