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Articles tagged with "Semiconductors, ALD, Nanotechnology"

Overview of ALD-Driven Oxide Semiconductors for High Density, Low Power Memory Architectures (imec, Hanyang Univ.)

Overview of ALD-Driven Oxide Semiconductors for High Density, Low Power Memory Architectures (imec, Hanyang Univ.)

Researchers from imec and Hanyang University published a technical paper titled "Oxide Semiconductor for Advanced Memory Architectures: Atomic Layer Deposition, Key Requirement and Challenges." The paper explores the evolution of oxide semiconductors (OSs) from display backplane materials to potential candidates for advanced memory and logic devices. It highlights the low leakage current and compatibility with three-dimensional (3D) architectures of OSs, sparking interest in their use in semiconductor applications. The review delves into atomic layer deposition (ALD) as a core technique for growing high-quality OS films, covering basic and advanced processes compatible with 3D scaling. Challenges in memory applications, such as contact resistance and lack of p-type materials, are discussed, along with the feasibility of ALD-grown OSs as solutions. The paper provides an outlook on the role of ALD-grown OSs in next-generation semiconductor memory technologies.

SemiEngineering
Every Atom Now Counts In Advanced Chip Manufacturing

Every Atom Now Counts In Advanced Chip Manufacturing

Advanced chip manufacturing is evolving to focus on materials engineering, with a shift towards atomic-layer deposition (ALD) and hybrid dielectrics to meet the demands of AI-era semiconductors. Traditional scaling strategies are reaching limits, leading to a greater reliance on materials that offer stability under extreme conditions. ALD, with its precision in controlling matter at the atomic level, has become crucial for gate-all-around transistors and interconnects. The industry is moving towards hybrid dielectric integration, combining ALD with other methods for optimal performance and reliability. The future of semiconductor progress lies in the precision and coordination of materials used in chip manufacturing.

SemiEngineering

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