Integrating Design Verification To Approach Zero Defects

The article discusses the challenges faced by the semiconductor industry in achieving near-perfect manufacturing test coverage to meet zero-defect targets. Traditional structural testing methods often miss subtle faults, leading to critical coverage gaps. The article introduces an integrated methodology that combines functional fault grading with structural testing to improve fault coverage. It highlights the importance of fault grading in identifying faults missed by structural testing, enhancing fault detection, and improving overall test quality. The methodology involves fault injection, propagation analysis, and fault classification to ensure robust fault detection across various failure modes.