First truly 3D chip fabbed at US foundry, features carbon nanotube transistors and RAM on a single die — future devices could have up to 1000x improvement in energy-delay product

A collaborative research team has developed the first monolithic 3D integrated circuit at a U.S. foundry, showcasing significant performance improvements over traditional flat chip designs. This chip, created by engineers from multiple universities and SkyWater Technology, features memory and logic stacked on top of each other in a single process, enhancing data flow efficiency. The prototype, made using a 90nm to 130nm process, incorporates silicon CMOS logic, resistive RAM layers, and carbon nanotube transistors, resulting in a four-fold increase in throughput compared to 2D designs. Simulation studies suggest potential 100-fold to 1,000-fold enhancements in energy-delay product through increased vertical integration. This achievement was presented at the IEEE International Electron Devices Meeting, showcasing the viability of commercializing advanced 3D chip architectures.