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Articles tagged with "FET Technology, Vertical FETs, Nanoscale Electronics, Semiconductor Research, Transistor Design"

A Comparative Study With Horizontal and Verticals FETs (POSTECH, Georgia Tech)

A Comparative Study With Horizontal and Verticals FETs (POSTECH, Georgia Tech)

Researchers from POSTECH and Georgia Tech published a technical paper comparing vertical FET (VFET) structures with horizontal FETs (HFET) for Angstrom nodes. The study introduces two novel VFET designs and evaluates their competitiveness against nanosheet FET (NSFET) and forksheet FET (FSFET). The findings show that the fork-shaped channel VFET (VFETFS) outperforms conventional VFET (VFETCON) and FSFET in terms of footprint size and performance due to reduced capacitance. Strategies like expanding the silicide area improve drive current and enable VFETFS to surpass FSFET for NFET. The study also explores a secondary device architecture, VFETFS with back-side contact (VFETBSC), which further reduces footprint and enhances performance for both N/PFET.

SemiEngineering

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