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Articles tagged with "DRAM, Bitflips, Hardware"

Understanding and Mitigating Column-Based Read Disturbance in DRAM Chips (ETH Zurich, CISPA)

Understanding and Mitigating Column-Based Read Disturbance in DRAM Chips (ETH Zurich, CISPA)

Researchers from ETH Zurich and CISPA published a technical paper titled “ColumnDisturb” that explores a new read disturbance phenomenon in DRAM chips. The study reveals that repeatedly opening or keeping a DRAM row open can disturb cells through a DRAM column, inducing bitflips in cells across multiple subarrays. The research highlights that ColumnDisturb affects chips from major manufacturers and worsens as DRAM technology scales down. It predicts potential implications for future DRAM chips and retention-aware refresh mechanisms. The study provides insights into the characteristics and implications of ColumnDisturb in real commodity DRAM chips.

SemiEngineering

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