Verification Futures with Bronco AI Agents for DV Debug
Source
Published
TL;DR
AI GeneratedVerification in chip design is a major bottleneck, with up to 70% of the design cycle spent on verification due to increasing complexity and limited engineering resources. Traditional approaches struggle to scale with the volume of data generated, leading to the development of Bronco AI agents for design verification (DV). These agents leverage large reasoning models and natural language guidance to efficiently analyze massive amounts of data and identify root causes of failures. By automating routine debug tasks and learning from past failures, AI agents enhance the verification process without replacing human expertise.