Tiling Support in SiFive’s AI/ML Software Stack for RISC-V Vector-Matrix Extension

At the 2025 RISC-V Summit North America, SiFive presented enhancements to their AI/ML software stack for the RISC-V Vector-Matrix Extension (VME) aimed at improving matrix multiplication efficiency for AI workloads. The VME implementation introduces a large matrix accumulator state for result matrix C, enabling outer-product-style multiplications directly into the accumulator. Tiled matrix multiplication was a key focus, optimizing data locality and reducing memory access overhead for large-scale AI models. SiFive's software stack seamlessly integrates these hardware features, leveraging the Intermediate Representation Execution Environment (IREE) for optimized execution on SiFive platforms. The advancements in multi-tile matrix multiplication within IREE improve efficiency, especially for deep neural networks with large K dimensions, showcasing SiFive's commitment to advancing RISC-V for AI acceleration.