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The Rise Of Panel-Level Packaging

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SemiEngineering

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An increasing demand for logic to memory integration in AI and high-performance computing is pushing the development of very large-format packages, expected to grow up to 10 times the maximum reticle size. Fan-out panel-level packaging is crucial for cost-effective integration of large die sizes with high I/O counts, necessitating advancements in equipment for better alignment and control of warpage. Panel-level packaging has already shown cost benefits in producing small devices like smart watches and IoT devices. The industry is moving towards organic interposers and glass-core substrates for panel-level packaging, with a focus on improving lithography processes to compensate for die shift.

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