Back to home
Technology

SK hynix shows 16-Hi HBM4 memory for AI accelerators — 48 GB at 10 GT/s over a 2,048 interface

Source

Tom's Hardware

Published

TL;DR

AI Generated

SK Hynix showcased its 16-Hi HBM4 memory at CES, featuring a 48 GB capacity with a 2,048-bit interface and operating at 10 GT/s, surpassing JEDEC specifications. The HBM4 technology allows for taller stacks and denser I/O and power bumps compared to HBM3. The backside of HBM4 exhibits a more densely packed BGA pin field, indicating higher bandwidth and power delivery capabilities. These advancements are achieved through custom DRAM dies on a 1b-nm process, promising improved performance and potentially lower costs for end users.

Read Full Article

Similar Articles

With $1 Cyberattacks on the Rise, Durable Defenses Pay Off

With $1 Cyberattacks on the Rise, Durable Defenses Pay Off

As cyberattacks that cost as little as $1 become more prevalent, the importance of robust cybersecurity defenses is highlighted. The article emphasizes the significance of writing memory-safe code over relying solely on patching vulnerabilities. Experts Evan Johnson and Justin Cappos from New York University stress the need for durable defenses in the face of rapid and powerful cyberattacks facilitated by large language models like Anthropic’s Claude Mythos. They suggest that a comprehensive approach beyond generative AI is essential for effective cyberdefense.

IEEE Spectrum
AMD's memory-boosting EXPO 1.2 is here, adds support for three Chinese memory vendors — performance gains could be muted until Zen 6

AMD's memory-boosting EXPO 1.2 is here, adds support for three Chinese memory vendors — performance gains could be muted until Zen 6

AMD has released EXPO 1.2, a memory-boosting technology for AM5 motherboards, enhancing memory overclocking capabilities and supporting three Chinese memory vendors. Notable improvements include support for module geometry, MRDIMMs for higher bandwidth, and Ultra Low Latency mode for reduced memory latency. However, the full performance gains may only be realized with AMD's upcoming Zen 6 processors. Asus has begun rolling out beta firmware with EXPO 1.2 support, signaling a commitment to enhancing the AM5 platform, though the full impact may not be felt until Zen 6 processors arrive in late 2026 or early 2027.

Tom's Hardware
NEO Semiconductor's revolutionary 3D X-DRAM for AI processors has passed proof-of-concept validation — company secures funding to develop next-gen memory HBM alternative

NEO Semiconductor's revolutionary 3D X-DRAM for AI processors has passed proof-of-concept validation — company secures funding to develop next-gen memory HBM alternative

NEO Semiconductor's 3D X-DRAM technology has successfully completed proof-of-concept validation, showcasing a new high-density DRAM class achievable through existing 3D NAND infrastructure. The company has secured funding for further development, with a strategic investment led by Stan Shih. The 3D X-DRAM technology offers enhanced density, lower power consumption, and AI workload suitability by leveraging 3D NAND manufacturing techniques. Industry experts view this advancement as a significant milestone in overcoming traditional DRAM scaling limits, particularly in the context of increasing demands from AI workloads. While the technology shows promise, it remains in the proof-of-concept stage, with the journey to commercial viability ahead.

Tom's Hardware
SoftBank subsidiary working with Intel to develop radical new ZAM memory is now receiving Japanese gov't subsidies — new memory designed as a lower-power HBM for AI workloads

SoftBank subsidiary working with Intel to develop radical new ZAM memory is now receiving Japanese gov't subsidies — new memory designed as a lower-power HBM for AI workloads

SAIMEMORY, a SoftBank Corp subsidiary working with Intel, has secured Japanese government subsidies for its ZAM memory technology project, aiming to develop a power-efficient HBM alternative for AI workloads. ZAM, a potential next-gen AI memory solution, is part of NEDO’s Post-5G Infrastructure Enhancement R&D Project. The project combines US government-backed research, Intel's R&D, and SoftBank's AI infrastructure focus. ZAM's unique design promises higher capacity, greater bandwidth, and 40% lower power consumption compared to traditional HBM, potentially challenging existing memory solutions in the market. The technology is still in early stages, with mass production projected for around 2029, supported by a consortium including SoftBank, Fujitsu, RIKEN, and government backing through NEDO.

Tom's Hardware

We use cookies

We use cookies to ensure you get the best experience on our website. For more information on how we use cookies, please see our cookie policy.