SK hynix completes development of next-gen HBM4 — 2,048-bit interface and 10 GT/s speeds promised for next-gen AI accelerators

SK hynix has announced the completion of the development of its HBM4 memory, featuring a 2,048-bit interface and 10 GT/s data transfer speeds, surpassing JEDEC specifications by 25%. The company's HBM4 stacks utilize advanced DRAM dies and a unique mass reflow molded underfill method for improved performance and heat dissipation. While details like the number of DRAM layers and capacity remain undisclosed, SK hynix is ready for mass production. The move to exceed JEDEC standards in data transfer rate aligns with industry trends, with Micron and Rambus also pushing boundaries in HBM4 technology. This advancement is expected to benefit next-gen AI accelerators from major players like AMD, Broadcom, and Nvidia.