Silicon Photonic Interconnected Chiplets With Computational Network And IMC For LLM Inference Acceleration (NUS)

Researchers at the National University of Singapore published a technical paper titled “PICNIC,” detailing a 3D-stacked chiplets-based large language model (LLM) inference accelerator. The system includes non-volatile in-memory-computing processing elements and an Inter-PE Computational Network interconnected via silicon photonics to address communication bottlenecks. The paper introduces a LLM mapping scheme for optimizing hardware scheduling and workload mapping, achieving significant speedup and efficiency improvements over Nvidia A100. The system further scales efficiently with chiplet clustering and power gating scheme implementation, outperforming Nvidia H100 in efficiency.