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Research Bits: Jan. 6

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SemiEngineering

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Researchers have made advancements in tech with ultrathin ferroelectric capacitors, a memristor-based ADC, and molecular electronics. The ultrathin ferroelectric memory capacitor stack is just 30nm thick and shows high performance even with reduced thickness. The memristor ADC can adjust settings based on data, improving energy efficiency and area reduction. The molecular device created can function as memory, logic gate, selector, analog processor, or electronic synapse, showing versatility in a single system. The aim is to integrate these technologies into silicon chips for neuromorphic hardware.

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Research Bits: Apr. 6

Researchers from various universities have made significant advancements in memristor technology. At Loughborough University, a memristor reservoir computing chip was developed, showing improved energy efficiency compared to software-based solutions. At the University of Michigan, a memristor made from 2D bismuth selenide demonstrated long-term data retention and analog tuning capabilities. Additionally, researchers from the University of Cambridge, Beijing Institute of Technology, and Lund University created a highly stable, low-energy hafnium oxide memristor. These developments pave the way for more efficient and versatile AI applications in the future.

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New Cambridge human brain-inspired chip could slash AI energy use — new type of memristor has roughly a million times lower switching current than conventional devices

New Cambridge human brain-inspired chip could slash AI energy use — new type of memristor has roughly a million times lower switching current than conventional devices

A new hafnium oxide memristor developed by researchers at the University of Cambridge operates at switching currents a million times lower than conventional devices, potentially reducing AI energy consumption significantly. The device, engineered by Dr. Babak Bakhit's team, can smoothly switch states at currents below 10 nanoamps, offering hundreds of distinct conductance levels. Memristors like these could lead to neuromorphic systems that cut computing power consumption by over 70%, eliminating the need for energy-intensive data transfers between memory and processing units. Despite promising advancements, a challenge lies in lowering the fabrication temperature to align with standard industry processes, as the current 700°C requirement exceeds CMOS manufacturing tolerances.

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Neuromorphic Computing Platform In Perovskite Nickelates (UCSD, Rutgers)

Neuromorphic Computing Platform In Perovskite Nickelates (UCSD, Rutgers)

Researchers from UCSD and Rutgers University have published a technical paper introducing a neuromorphic computing platform using perovskite nickelates. This platform combines nonlinear spatiotemporal processing and programmable memory within a single material system. By engineering symmetric and asymmetric hydrogenated NdNiO3 junction devices, the platform achieves ultrafast proton-mediated transient dynamics and stable multilevel resistance states. Networks of symmetric NdNiO3 junctions demonstrate emergent spatial interactions mediated by proton redistribution, enabling real-time pattern recognition and high accuracy in tasks like spoken digit classification and early seizure detection. The platform is described as compact, energy-efficient, and CMOS-compatible, offering integrated processing and memory capabilities for scalable intelligent hardware.

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ReRAM-based Neo-Hebbian Synapses For Training Neuromorphic HW (IIT Madras, UCSB)

Researchers from IIT Madras and UC Santa Barbara have published a technical paper introducing a novel NeoHebbian artificial synapse using ReRAM devices for neuromorphic systems. This synapse incorporates two state variables: a neuron coupling weight and an "eligibility trace" for synaptic weight updates. The coupling weight is encoded in ReRAM conductance, while the "eligibility trace" is encoded in local temperature modulated by voltage pulses. The synapse was tested for tasks like temporal signal classification and reinforcement learning, showing promise for efficient implementation of advanced learning rules in neuromorphic hardware.

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