Back to home
Technology

proteanTecs at Chiplet Summit – Changing the Game for Health & Performance Monitoring of Chiplets

Source

SemiWiki

Published

TL;DR

AI Generated

proteanTecs showcased their innovative technology at the Chiplet Summit, focusing on health and performance monitoring of chiplets. The company uses a novel approach to provide accurate information about chip health throughout its lifetime without impacting die size. Their monitoring system, leveraging ML-driven software, offers continuous performance monitoring and adaptive voltage scaling to optimize chip performance and power consumption. The technology demonstrated by proteanTecs aims to ensure safe and robust operation of chips with minimal overhead, extending the chip's lifetime while improving efficiency. Customers can also develop their own applications using proteanTecs technology, which offers a range of capabilities for chip design optimization.

Read Full Article

Similar Articles

SemiEngineering

Chiplet Standards Aim For Plug-n-Play

Chiplet standards are crucial for creating a marketplace where chiplets can be easily interchanged like LEGOs. Various standards are being developed to ensure interoperability and physical composability of chiplets, including die-to-die interconnect standards like Bunch of Wires (BoW) and Universal Chiplet Interconnect Express (UCIe). These standards cover system architecture, security, power delivery, data semantics, physical placement, testing, and more. Organizations like the Open Compute Project (OCP) are leading efforts to standardize chiplet-related aspects, such as packaging descriptions and system architectures. The goal is to pave the way for a plug-and-play chiplet marketplace, although challenges related to practical and economic factors still exist.

SemiEngineering
SemiEngineering

Breakthrough Thin GaN Chiplet Technology

Researchers at Intel Foundry have developed a breakthrough thin GaN chiplet technology that combines GaN transistors with silicon-based digital circuits to enable complex computing functions directly in power chiplets. This innovation, presented at the 2025 IEEE International Electron Devices Meeting, addresses the challenge of delivering more power, speed, and efficiency in a compact space. The ultra-thin GaN chiplet, with a base silicon measuring just 19 μm thick, incorporates the industry's first fully monolithic on-die digital control circuits. This technology offers concrete improvements in data centers, wireless infrastructure, and other industries by enabling faster switching, lower energy loss, and efficient power conversion. The use of GaN material allows for higher power density, better performance at high frequencies, and compatibility with existing silicon manufacturing infrastructure.

SemiEngineering
SemiEngineering

Developing A Security Framework For Chiplet-Based Systems

The article discusses the importance of developing a security framework for chiplet-based systems. In chiplet platforms, security must be addressed at the platform level to ensure every security-relevant chiplet has a validated identity. Two common provisioning patterns are described: externally provisioned identity and silicon-derived identity. The article emphasizes the need for chiplet identity to be policy-bound and discusses boot authentication, trust-chain infrastructure, securing die-to-die communication, and lifecycle security in chiplet systems. The focus is on ensuring secure communication, trust decisions, and lifecycle governance in multi-die chip systems.

SemiEngineering
Siemens Wins Best in Show Award at Chiplet Summit and Targets Broad 3D IC Design Enablement

Siemens Wins Best in Show Award at Chiplet Summit and Targets Broad 3D IC Design Enablement

Siemens EDA won the Best in Show Award at the recent Chiplet Summit for its Innovator3D IC™ solution in the Packaging: Design category. The award recognizes Siemens' commitment to delivering cutting-edge technologies for semiconductor development. The company aims to accelerate the design of next-generation semiconductors by offering a system-level design approach that optimizes heterogeneous dies, chiplets, interposers, and packages within a unified flow. Siemens is focusing on integrating various tools to address the complexities of 3D IC design, with a team of senior architects and engineers working on complete solutions. The company is also exploring innovations in materials, such as organic interposers, to enhance 3D IC design capabilities.

SemiWiki

We use cookies

We use cookies to ensure you get the best experience on our website. For more information on how we use cookies, please see our cookie policy.