Overcoming The vdW Gap Bottleneck in Semiconductor Scaling (TU Wein)
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AI GeneratedResearchers at TU Wien published a technical paper titled “The van der Waals Gap: a Hidden Showstopper in Semiconductor Device Scaling,” highlighting the challenge of controlling gate leakage in ultrathin dielectrics due to van der Waals (vdW) gaps between 2D semiconductors and gate dielectrics. Through calculations and experiments, they found that vdW gaps can act as tunneling barriers, reducing gate leakage but also introducing parasitic capacitance. The paper introduces a figure of merit to predict the minimum achievable equivalent oxide thickness (EOT) in the presence of a vdW gap, suggesting that many insulators may struggle to scale to the EOT targets set by industry roadmaps. The researchers propose exploring “zippered” structures as an alternative to address the limitations imposed by vdW gaps.