Back to home
Technology

Industry's first TSMC COUPE-based optical connectivity solution for next-gen AI chips displayed — Alchip and Ayar Labs show future silicon photonics device

Source

Tom's Hardware

Published

TL;DR

AI Generated

Alchip and Ayar Labs showcased a TSMC COUPE-based optical connectivity solution at TSMC's European OIP forum, designed for next-gen AI accelerators. This solution integrates Ayar's silicon-photonics TeraPHY IC with Alchip's electrical interface die and detachable fiber connector, offering up to 100 Tb/s of bandwidth per accelerator. The system targets hardware developers seeking optical connectivity without the need to build their own optical subsystem. The three-chiplet co-packaged optical I/O subsystem includes a protocol-converter chiplet, EIC, and TeraPHY PIC, enabling high-speed optical modulation and detection. This production-ready solution allows smaller chip designers to incorporate optical connectivity affordably and efficiently.

Read Full Article

Similar Articles

SemiEngineering

Panel-Level Packaging’s Second Wave Meets Engineering Reality

Panel-level packaging is gaining traction due to economic pressures and the increasing size of AI accelerators and HPC packages. Glass substrates are being explored to address warpage and dimensional stability issues, but they introduce new failure modes that require material solutions. Challenges in panel-level processing include materials and process integration, not just packaging problems. The industry is moving towards panels driven by economic and technological shifts, but solving these challenges requires a holistic approach.

SemiEngineering
SemiEngineering

Inside the AI Accelerator: Essential IP Design Solutions: eBook

The eBook delves into how advanced IP, high-speed interconnects, memory interfaces, and multi-die architectures are utilized in next-gen AI accelerators to surpass single-chip limitations. It highlights the role of optical links in enhancing bandwidth and security IP in safeguarding AI data without compromising performance. The eBook also covers how technologies like UALink, PCIe, CXL, and Ultra Ethernet support scaling AI architectures, integrating compute, memory, and accelerators, and enhancing bandwidth density through optical I/O. The focus is on unlocking AI performance at scale and ensuring data security across accelerators.

SemiEngineering
Meta reportedly buying RISC-V AI GPU firm Rivos — acquisition to bolster dev team and possibly replace Nvidia internally

Meta reportedly buying RISC-V AI GPU firm Rivos — acquisition to bolster dev team and possibly replace Nvidia internally

Meta is in talks to acquire RISC-V chip startup Rivos to enhance its internal chip development teams and potentially reduce reliance on Nvidia GPUs. Rivos specializes in designing GPUs and AI accelerators on the RISC-V open standard. If the deal goes through, Meta could become a major player in RISC-V chip production. The acquisition may help Meta advance its AI initiatives and address CEO Mark Zuckerberg's concerns about slow progress in chip development. Apple previously sued Rivos for alleged theft of insider information, with the companies settling in 2024.

Tom's Hardware
Huawei unveils Atlas 950 SuperCluster — promises 1 ZettaFLOPS FP4 performance and features hundreds of thousands of 950DT APUs

Huawei unveils Atlas 950 SuperCluster — promises 1 ZettaFLOPS FP4 performance and features hundreds of thousands of 950DT APUs

Huawei has introduced the Atlas 950 SuperCluster, a high-performance AI solution featuring 1 ZettaFLOPS FP4 performance and hundreds of thousands of Ascend 950DT NPUs. The system is designed to compete with Nvidia's Rubin-based systems by late 2026. The SuperCluster comprises 64 Atlas 950 SuperPoDs with 524,288 AI accelerators spread across over 10,240 interconnected cabinets, offering up to 524 FP8 ExaFLOPS for AI training and 1 FP4 ZettaFLOPS for AI inference. Huawei positions the SuperCluster to support large-scale AI models with billions to trillions of parameters, emphasizing compute throughput, interconnect bandwidth, and system stability. Huawei also revealed plans for the Atlas 960 SuperCluster in late 2027, promising even higher performance with over 1 million Ascend 960 NPUs.

Tom's Hardware

We use cookies

We use cookies to ensure you get the best experience on our website. For more information on how we use cookies, please see our cookie policy.