Comprehensive Performance Bound and Bottleneck Analysis Of Neuromorphic Accelerators (Harvard, Politecnico di Torino, Intel et al.)

Researchers from Harvard University, Politecnico di Torino, Intel, and other institutions published a technical paper titled “Modeling and Optimizing Performance Bottlenecks for Neuromorphic Accelerators.” The paper explores the unique architectural characteristics of neuromorphic accelerators for machine learning inference and presents a comprehensive performance analysis. By studying three real neuromorphic accelerators, the researchers identified memory-bound, compute-bound, and traffic-bound bottleneck states and proposed an optimization methodology for substantial performance improvements. The methodology combines sparsity-aware training with floorline-informed partitioning, resulting in significant runtime improvements and energy reductions compared to prior configurations.