Technology

Chip Industry Technical Paper Roundup: Sept 23

Source

SemiEngineering

Published

Sep 23, 2025

TL;DR

AI Generated

New technical papers added to Semiconductor Engineering's library cover topics such as optimizing long-context agentic LLM inference, retargeting hardware for RISC-V custom instructions, identifying divergences in hardware designs for HPC workloads, and more. Research organizations like University of Cambridge, Tampere University, Lawrence Berkeley National Lab, and others are involved in these studies. The papers also delve into memory design, hardware acceleration, in-memory computing, and side-channel attacks. For more semiconductor research papers, visit Semiconductor Engineering's library.

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AI agent designs a complete RISC-V CPU from a 219-word spec sheet in just 12 hours — comparably simple design required 'many tens of billions of tokens'

Verkor.io's AI system, Design Conductor, autonomously designed a complete RISC-V CPU core from a 219-word spec sheet in just 12 hours, a significantly faster timeline compared to traditional chip design processes. The resulting processor, VerCore, is a five-stage pipelined core that achieved a CoreMark score of 3,261. While the system showed impressive capabilities, it still requires human experts to guide it towards a production-ready chip, and the compute requirements increase non-linearly with design complexity. Verkor plans to release VerCore's RTL source and build scripts soon and showcase an FPGA implementation at the Electronic Design Automation Conference.

Tom's Hardware•

1 week ago

Disaggregating LLM Inference: Inside the SambaNova Intel Heterogeneous Compute Blueprint

SambaNova Systems and Intel have introduced a blueprint for heterogeneous inference that optimizes modern large language model (LLM) workloads by utilizing specialized hardware for different phases of inference: GPUs for prefill, SambaNova RDUs for decode, and Intel Xeon 6 CPUs for agentic tools and orchestration. This approach addresses the complexity of agentic AI systems with varying compute demands. By isolating tasks onto specific hardware, the architecture improves efficiency, scalability, and cost-effectiveness. The design reflects a shift towards specialized compute fabrics and better supports the evolving landscape of AI reasoning systems.

SemiWiki•

1 week ago

Geekbench 6.7 adds Intel BOT detection to spoof out 'unrealistic' CPU scores — Benchmark runs with BOT enabled will be marked as invalid

Geekbench 6.7 has introduced Intel BOT detection to flag benchmark results with the Binary Optimization Tool (BOT) as invalid. The BOT feature, supported by Intel's latest Core Ultra chips, can selectively boost performance in specific tasks, leading to concerns about unrealistic performance representations. Geekbench's update aims to maintain fair benchmarking by identifying and invalidating results with BOT enabled. Additionally, the update includes improvements like enhanced SoC identification on Android and better support for RISC-V processors and Arm-based Linux systems.

Tom's Hardware•

3 weeks ago

Architecting Intelligence: The Rise of RISC-V CPUs in Agentic AI Infrastructure

SiFive's recent $400 million Series G financing marks a significant milestone in the development of high-performance RISC-V CPUs tailored for agentic AI data center workloads. The funding aims to accelerate next-gen CPU IP, software ecosystem growth, and hyperscale deployment capabilities to address emerging compute challenges in AI infrastructure. CPUs are increasingly crucial in agentic AI systems due to their efficiency in handling complex control flow and orchestration tasks compared to GPUs and specialized accelerators. RISC-V's modular architecture allows for tailored extensions that enhance efficiency in handling diverse AI workloads. The focus is on integrating scalar pipelines with vector and matrix compute units to reduce memory bandwidth overhead and improve power efficiency, crucial as AI clusters scale. The investment also emphasizes expanding software compatibility and enabling customer-specific CPU customization to meet evolving AI workload demands.