Tech News
Back to home
Technology

CEO Interview with Xianxin Guo of Lumai

Source

SemiWiki

Published

TL;DR

AI Generated

Xianxin Guo, CEO of Lumai, discusses the company's optical computing technology for AI and data center acceleration, aiming to address power efficiency and scalability limitations of traditional silicon-based approaches. Lumai's hybrid optical-electronic design enhances compute efficiency by leveraging light for key operations, reducing energy consumption and breaking through AI system bottlenecks. The technology is well-suited for high-throughput AI inference workloads in data centers, offering a more cost-effective and scalable solution. By focusing on optical compute, Lumai differentiates itself from competitors and aims to redefine AI compute efficiency for long-term scalability and performance gains. The company engages with customers through collaborative discussions and partnership-driven approaches to integrate optical computing seamlessly into existing AI infrastructure.

Read Full Article

Similar Articles

Intel launches Wildcat Lake as Core Series 3 for value laptops and edge systems — six consumer SKUs built on 18A promise 'all-day' battery life

Intel launches Wildcat Lake as Core Series 3 for value laptops and edge systems — six consumer SKUs built on 18A promise 'all-day' battery life

Intel has unveiled its Core Series 3 mobile processors, known as Wildcat Lake, featuring six consumer SKUs and one edge-only variant, all built on 18A technology promising extended battery life. The lineup includes various configurations with P-cores, E-cores, NPUs, and Xe3 integrated GPUs, offering up to 40 platform TOPS and hybrid AI capabilities. Memory support tops out at LPDDR5x-7467 or DDR5-6400 in a single-channel setup, with performance improvements compared to previous generations. Initial laptop designs from Acer, HP, MSI, and others are set to launch, targeting students, small businesses, and edge deployments.

Tom's Hardware•
Analyzing Elon Musk's TeraFab — A step towards Tesla and SpaceX's partial vertical integration, or an unattainable dream?

Analyzing Elon Musk's TeraFab — A step towards Tesla and SpaceX's partial vertical integration, or an unattainable dream?

Elon Musk's TeraFab project aims to produce AI logic chips and HBM memory, requiring trillions of dollars and hundreds of fabs, posing challenges in capital, equipment availability, and workforce expertise. The project's scale exceeds current industry capacity, with constraints in lithography tool supply and process technology development. TeraFab would need hundreds of thousands of construction workers and over 300,000 skilled employees, raising doubts about its feasibility. While ambitious, the project may serve as a step towards partial vertical integration for Musk's companies rather than a complete transformation of the semiconductor market.

Tom's Hardware•
Jim Keller's Tenstorrent is downgrading Blackhole p150 cards from 140 to 120 tensor cores via firmware update — will ship cards with 120 tensor cores going forward, company claims existing users should expect 1-2% performance drop

Jim Keller's Tenstorrent is downgrading Blackhole p150 cards from 140 to 120 tensor cores via firmware update — will ship cards with 120 tensor cores going forward, company claims existing users should expect 1-2% performance drop

Tenstorrent, led by Jim Keller, is reducing the number of tensor cores on its Blackhole p150 cards from 140 to 120 through a firmware update, affecting both existing and new units. The company claims that users should expect a minor 1-2% performance drop due to this change. The reason behind this downgrade remains unclear, leaving customers puzzled. Despite the reduction in tensor cores, Tenstorrent asserts that the impact on performance should be minimal, especially for single-card setups. The company's move has sparked discussions among users about the utilization of the hardware and potential effects on existing code.

Tom's Hardware•
LLMs on Analog In-Memory Computing Based Hardware (IBM Research, ETH Zurich)

LLMs on Analog In-Memory Computing Based Hardware (IBM Research, ETH Zurich)

A technical paper by IBM Research and ETH Zurich introduces a method to adapt large language models (LLMs) for execution on noisy, low-precision analog hardware, improving speed and power efficiency for neural network inference. The method enables high-capacity LLMs to achieve performance comparable to traditional architectures despite analog noise and quantization constraints. The paper also demonstrates benefits in test-time compute scaling and the adaptability of analog foundation models for inference on low-precision digital hardware. This work bridges the gap between LLMs and efficient analog hardware, offering energy-efficient foundation models.

SemiEngineering•

We use cookies

We use cookies to ensure you get the best experience on our website. For more information on how we use cookies, please see our cookie policy.