Technology

Apply Tee Networks to Broaden TIA Required Solutions (Part 2): Loop Gain Plot, Noise, and Single-Supply Operation

Source

ElectronicDesign

Published

Apr 16, 2026

TL;DR

AI Generated

Part 2 of the article explores the impact of adding a tee to the op-amp loop gain plot, focusing on loop gain plot modification, noise analysis, and single-supply operation for transimpedance amplifiers (TIAs). The article discusses how the tee network affects output noise and details modifications required for single-supply operation. It also demonstrates the application of the tee network using a JFET input device in a 50-MΩ TIA design. The tee network method allows for adjusting the required capacitance values for easier implementation while considering typical parasitic capacitance on resistors.

Read Full Article

Apply Tee Networks to Broaden TIA Required Solutions—Part 1: Compensation Flow

The article discusses a four-step compensation flow for achieving a closed-loop Butterworth response in a Transimpedance Amplifier (TIA) design. It explains the process of setting the feedback pole and achieving a maximally flat Butterworth response. Additionally, it explores how adding a resistive tee network within the TIA design can help in shifting the required compensation capacitor value into a more repeatable range. The article provides detailed insights into the design considerations, compensation analysis, and the impact of adding a resistive tee network on the TIA design.

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